MCQ Questions for Class 12 Medical Physics Semiconductor Electronics: Materials, Devices And Simple Circuits Quiz 9

CBSE Questions for Class 12 Medical Physics Semiconductor Electronics: Materials, Devices And Simple Circuits Quiz 9 - MCQExams.com

CBSE Questions for Class 12 Medical Physics Semiconductor Electronics: Materials, Devices And Simple Circuits Quiz 9 - MCQExams.com

Practice Class 12 Medical Physics Quiz Questions and Answers

Practice Class 12 Medical Physics Quiz Questions and Answers

0:0:3

0:0:3

Support mcqexams.com by disabling your adblocker.

The truth table of the combination of the logic gates shown in the figure is

Explanation

When inputs

$A$ and

$B$ entered in first

$NAND$ gate , then output ,

$y_{1}=\bar {(A.B)}$

When inputs

$A$ and

$B$ entered in

$NOR$ gate , then output ,

$y_{2}=\bar {(A+B)}$

When inputs

$y_{1}$ and

$y_{2}$ entered in second

$NAND$ gate , then output ,

$y=\bar{(\bar {A.B}).(\bar{A+B})}$

This is the Boolean expression for the given diagram

Now , when

$A=1 ,B=0$

$y=\bar{(\bar {0.0}).(\bar{0+0})}=\bar{1.1}=0$

when

$A=0 ,B=0$

$y=\bar{(\bar {1.0}).(\bar{1+0})}=\bar{1.0}=1$

when

$A=0 ,B=1$

$y=\bar{(\bar {0.1}).(\bar{0+1})}=\bar{0.1}=1$

when

$A=1 ,B=1$

$y=\bar{(\bar {1.1}).(\bar{1+1})}=\bar{0.0}=1$

Option B is correct.

If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and the output is HIGH, the gate is a(n):

0%
AND
0%
NAND
0%
NOR
0%
OR

For a common emitter circuit amplifier, the load resistance of the output circuit is

$500$ times the resistance of the input. circuit. If

$\alpha = 0.98$ , then, current gain is :

0%
$0.98$
0%
$50$
0%
$98$
0%
$49$

Explanation

Given,

$\alpha = 0.98$

$\beta = \dfrac{\alpha}{1-\alpha} = \dfrac{0.98}{1-0.98} = 49$

For a transistor, the current amplification factor is 0.The transistor is connected in common emitter configuration. The change in collector current when the base current changes by 6 mA is

0%
1.2 mA
0%
24 mA
0%
3.6 mA
0%
4.8 mA

Explanation

$\alpha = 0.8$

$\Rightarrow \beta = 0.8/(1-0.8) = 4$

Also,

$\beta = \triangle i_{c}/\triangle i_{b}$

$\Rightarrow \triangle i_{c} = \beta \times \triangle i_{b} = 4 \times 6 \,mA = 24\,mA$

1086209_597212_ans_655dfa59d16d4311bc3d7fbfe25c0bf0.jpg

In graphs of the electronic band structure of solids, the band gap generally refers to the _______________________ between the top of the valence band and the bottom of the conduction band in insulators and semiconductors.

0%
current difference
0%
energy difference (in electron volts)
0%
hole difference
0%
none of the above

In common transistor circuit, the current gain is 0.On changing emitter current by 5.0 mA, the change in collector current is

0%
3.5 mA
0%
4.9 mA
0%
6.3 mA
0%
9.4 mA

Explanation

Using

$\alpha =\dfrac{\Delta I_{C}}{\Delta I_{E}}$
where

$\alpha=0.98$

$\Delta I_{C}=5$ mA

$\Delta I_{C}=0.98\times5\times10^{-3}$

$\Rightarrow =4.9$ mA

Rectifiers are used to convert

0%
Direct current to Alternating current
0%
Alternating current to Direct current
0%
High voltage to low voltage
0%
Low voltage to high voltage

A logic gate which has an output

$'1'$ only when the inputs are complement to each other is.

0%
AND
0%
NAND
0%
NOR
0%
EXOR

Explanation

From the truth table of each gate, we can get only output 1 for complement inputs for

$EXOR$ gate.

Here, when

$A=0, B=1 \Rightarrow$ output

$=1$ and when

$A=1, B=0 \Rightarrow$ output

$=1$

Which of the following is not an advantage of Integrated Circuits (ICs).

0%
Extremely small in size
0%
High power consumption
0%
Low cost
0%
Less weight

The output wave form of full-wave rectifier is

If we add impurity to a metal those atoms also deflect electrons. Therefore,

0%
The electrical and thermal conductivities both increase
0%
The electrical and thermal conductivities both decrease
0%
The electrical conductivity increases but thermal conductivity decreases
0%
The electrical conductivity decrease but thermal conductivity increases

A Zener diode, having breakdown voltage equal to

$15 V$ is used in a voltage regulator circuit shown in figure. The current through the diode is

0%
$10 mA$
0%
$15 mA$
0%
$20 mA$
0%
$5 mA$

When the inputs of a two input logic gate are

$0$ and

$0$ , the output is

$1$ . When the inputs are

$1$ and

$0$ the output is

$0$ . The logic gate is the type

0%
AND
0%
NAND
0%
NOR
0%
OR

Explanation

The output of AND gate is

$Y=A.B$

A full wave rectifier circuit along with the input and output are shown in the figure. The contribution from the diode

$1$ is are

0%
$C$
0%
$A,\ C$
0%
$B$ & $D$
0%
$A,\ B,\ C,\ D$

Explanation

In the given full cycle, when the input voltage is positive, the diode

$D_1$ is in forward bias, while it is in reverse bias for negative input.

Thus, the Diode contributes for the cycle components

$A$ and

$C$

In a transistor biased in the common-emitter mode the emitter current is

0%
Much smaller than base current
0%
Much larger than base current
0%
Nearly equal to the base current
0%
Much smaller than the collector current

Explanation

$I_C=$ collector current,

$I_B=$ base current,

$I_E=$ emitter current

In common emitter mode,

$I_E=I_C+I_B$

Also,

$\beta=\dfrac{I_C}{I_B}$

and

$\beta$ is very large.

So,

$I_B$ is very small.

So,

$I_E$ is much larger than

$I_B$ .

In an unbiased

$p-n$ junction

0%
Potential at $p$ is more than that at $n$
0%
Potential at $p$ is less than that at $n$
0%
Potential at $p$ is equal to that at $n$
0%
Potential at $p$ is +ve and that at $n$ is -ve

To get an output

$y = 1$ from the circuit shown, the inputs

$A$ ,

$B$ and

$C$ must be respectively

0%
$0, 1, 0$
0%
$1, 0, 0$
0%
$1, 0, 1$
0%
$1, 1, 0$

Explanation

AND gate produces output as

$1$ only when both of its inputs are

$1$ , and OR gate produces output as

$1$ when either of its input is

$1$ .

Thus to get an output

$Y=1$ , input

$A$ must be

$1$ ,

$B$ must be

$0$ and

$C$ must be

$1$ .

Which logic gate produces 'LOW' output when any of the inputs is 'HIGH'?

0%
AND
0%
OR
0%
NAND
0%
NOR

The following truth table corresponds to the logic gate :

A	B	Y
0	0	0
0	1	1
1	0	1
1	1	1

0%
NAND
0%
AND
0%
XOR
0%
OR

Explanation

This is truth table for OR logic gate because for

OR gate,

$X=A+B$ .

A logic gate whose output will be in logic

$0$ state only when all inputs are in logic

$1$ state is called.

0%
AND
0%
OR
0%
NOR
0%
NAND

In the given circuit, the binary inputs at

$A$ and

$B$ are both

$1$ in one case and both

$0$ in the next case. The respective outputs at

$Y$ in these two cases will be

0%
$1,1$
0%
$0,0$
0%
$0,1$
0%
$1,0$

Explanation

$Y=\overline { AB+\overline { A } \overline { B } }$
for

$A=1,B=1$

$\Rightarrow$

$Y=0$ and for

$A=0,B=0$

$\Rightarrow$

$Y=0$

The truth table for the following logic circuit is

0%
$\begin{vmatrix} A & B & Y \\ 0 & 0 & 0 \\ 0 & 1 & 1 \\ 1 & 0 & 1 \\ 1 & 1 & 0 \end{vmatrix}$
0%
$\begin{vmatrix} A & B & Y \\ 0 & 0 & 1 \\ 0 & 1 & 1 \\ 1 & 0 & 1 \\ 1 & 1 & 1 \end{vmatrix}$
0%
$\begin{vmatrix} A & B & Y \\ 0 & 0 & 1 \\ 0 & 1 & 0 \\ 1 & 0 & 1 \\ 1 & 1 & 0 \end{vmatrix}$
0%
$\begin{vmatrix} A & B & Y \\ 0 & 0 & 1 \\ 0 & 1 & 1 \\ 1 & 0 & 0 \\ 1 & 1 & 1 \end{vmatrix}$

Explanation

The truth table for the given logic circuit is

$A$	$B$	$\overline { A }$	$\overline { B }$	$\overline { A } \cdot B$	$A\overline { B }$	$Y=\overline { A } B+A\overline { B }$
$0$	$0$	$1$	$1$	$0$	$0$	$0$
$0$	$1$	$1$	$0$	$1$	$0$	$1$
$1$	$0$	$0$	$1$	$0$	$1$	$1$
$1$	$1$	$0$	$0$	$0$	$0$	$0$

In the diagram, section A represents:

0%
N-type germanium
0%
P-type germanium
0%
Anode
0%
Diode

For the combination of gates shown here, which of the following truth table part is not true?

0%
$A = 0, B = 1, C = 1$
0%
$A = 0, B = 0, C = 0$
0%
$A = 1, B = 1, C = 1$
0%
$A = 1, B = 0, C = 1$

Explanation

Key Point Draw the truth table of the given operation and match the output with given options.
The combination of gates is given
For the given operation, equivalent truth table can be written as

$A$	$B$	$A\cdot B$	$A + A\cdot B$
$0$	$1$	$0$	$0$
$1$	$0$	$0$	$1$
$0$	$0$	$0$	$0$
$1$	$1$	$1$	$1$

Out of the given option, option (a) can't justify the given truth table. So, option (a) is correct.

In reverse biased

$p-n$ junctions, the junction region consists of :

0%
Holes
0%
Electrons
0%
Donor ions and acceptor ions
0%
The intrinsic material

Which logic gate is represented by the following combination of logic gates?

0%
OR
0%
NAND
0%
XOR
0%
None of these

The truth table given is for which gate?

A	B	Y
$0$	$0$	$1$
$0$	$1$	$1$
$1$	$0$	$1$
$1$	$1$	$0$

0%
XOR
0%
OR
0%
AND
0%
NAND

In an n-p-n transistor circuit, the collector current is 10 mA. If

$96\%$ of the electrons emitted reach the collector :

0%
The base current will be $1 mA$
0%
The base current will be $-1 mA$
0%
The emitter current will be $9 mA$
0%
The emitter current Will be $15 mA$

Explanation

$I_C=90\%$ of

$I_E$ (according to questions)

$\Rightarrow 10mA=\dfrac{90}{100}I_E$

$I_E=\dfrac{10\times 10}{9}=11 mA$

$I_B=I_E-I_C=11-10=1mA$

The following truth table corresponds to the logic gate

A	B	X
0	0	0
0	1	1
1	0	1
1	1	1

0%
NAND
0%
OR
0%
AND
0%
XOR

In a transistor, the collector current is always less than the emitter current because :

0%
Collector side is reverse biased and the emitter side is forward biased
0%
A few electrons are lost in the base and only remaining ones reach the collector
0%
Collector being reverse biased, attracts less electrons
0%
Collector side is forward biased and emitter side is reverse biased

Identify the operation performed by the circuit given below :

0%
NOT
0%
AND
0%
OR
0%
NAND

The output of a OR gate is

$1$ :

0%
If either input is zero
0%
If both inputs are zero
0%
Only if both inputs are $1$
0%
If either or both inputs are $1$

Explanation

The output of a OR gate is

$\gamma =A+B$ .

What the circuit represents from the equivalent circuit?

0%
NAND gate
0%
OR gate
0%
AND gate
0%
NOR gate

Explanation

Output of NOR gate

$y' = \overline{A+B}$

Output of NAND gate

$y'' = \overline{(A+B).(A+B)}$

$= \overline{(A+B)} \overline{(A+B)}$

$= (A+B) (A+B)$

$A+B$

Output of NOT gate

$y"" = \overline{A+B}$

$\therefore$ The Boolean expression is for NOR gate.

In the adjoining circuit of logic gate, the output

$Y$ becomes zero if the inputs are

0%
$A = 1, B = 1, C = 0$
0%
$A = 0, B = 0, C = 0$
0%
$A = 0, B = 1, C = 1$
0%
$A = 1, B = 0, C = 0$

Explanation

The output

$Y = \overline {(A\cdot B)\cdot C} = \overline {(A \cdot B)} + \overline {\overline {C}}$

$= \overline {(A\cdot B)} + C$
So,

$Y = 0$ if

$A = 1, B = 1$ and

$C = 0$ .

For a transistor connected in common emitter mode, the voltage drop across the collector is

$2.5 V$ and

$\beta$ is

$50$ . Find the base current if

$R_C$ is

$2k\Omega$ .

0%
$10 \mu A$
0%
$15 \mu A$
0%
$20 \mu A$
0%
$25 \mu A$

A system of logic gates is shown in the figure. From the study of truth table it can be found that to produce a high output (1) at

$R$ , we must have

0%
$X=0,Y=1$
0%
$X=1,Y=1$
0%
$X=1,Y=0$
0%
$X=0,Y=0$

Explanation

The truth table can be written as

So,

$X=1,Y=0$ gives output

$R=1$

What is the voltage gain in a common emitter amplifier, when input resistance is 3

$\Omega$ and load resistance is 24

$\Omega$ with

$\beta = 60$ ?

0%
$480$
0%
$2.4$
0%
$4.8$
0%
$8.4$

Explanation

Given :

$\beta = 60$

Input resistance

$R_1 = 3\Omega$

Output resistance

$R_2 = 24\Omega$

Voltage gain

$A_v = \beta \times \dfrac{R_2}{R_1} = 60 \times \dfrac{24}{3} = 480$

In a common-emitter configuration, a transistor has

$\beta = 50$ and input resistance

$1 K \Omega$ . If the peak value of AC input is 0.01 V, then the peak value of collector current is

0%
$0.01 \mu A$
0%
$500 \mu A$
0%
$100\mu A$
0%
$0.5 \mu A$
0%
$50\mu A$

Explanation

$I_B$ =

$\dfrac {V_i}{R_i}$

$I_B$ =

$\dfrac {10^{-2}}{10^3}$

${10^{-5}}$

collector current

${I_c} = \beta {I_B}$

$50 \times {10^{-5}}$

500uA

The input resistance of a common emitter transistor amplifier, if the output resistance is 500 k

$\Omega$ , the current gain

$\alpha = 0.98$ and the power gain is

$6.0625 \times 10^6$ , is

0%
$198 \Omega$
0%
$300 \Omega$
0%
$100 \Omega$
0%
$400 \Omega$

Explanation

Power gain = Current gain

$\times$ volume gain .....(1)
Voltage gain

$A_v = \beta \dfrac{R_2}{R_1}$

Output resistance

$R_2 = 500\times 10^3 \ \Omega$
Also, current gain

$\beta = \dfrac{\alpha}{1 - \alpha} = \dfrac{0.98}{1 - 0.98} = 49$

$\therefore \ A_v = (49) \left( \dfrac{500 \times 10^3}{R_1}\right )$
Power gain

$= 6.0625 \times 10^6$ (Given)

From (1), we get

$6.0625 \times 10^6$

$= 49 \times \left( \dfrac{500 \times 10^3}{R_1} \right ) \times 49$

$\Rightarrow R_1 = 198 \Omega$

In a common base transistor circuit, the current gain is

$0.98$ . On changing the emitter current by

$5.00$ mS, the change in collector current is

$?$

0%
$0.196$ mA
0%
$2.45$ mA
0%
$4.9$ mA
0%
$5.1$ mA

Explanation

Given,

$\alpha =0.98$

$\therefore \alpha =\displaystyle\frac{\Delta I_c}{\Delta I_e}$

$0.98=\displaystyle\frac{\Delta I_c}{5}$

$\Rightarrow \Delta I_c=4.9$ mA.

The efficiency of a full wave rectifier is?

0%
Half of half wave rectifier
0%
$3$ times of half wave rectifier
0%
Double of half wave rectifier
0%
Same as half wave rectifier

Explanation

Efficiency of half-wave and full wave rectifier is given by

$\eta_h=40.6\%$ and

$\eta_f=81.2\%$
So,

$\displaystyle\frac{\eta_h}{\eta_f}=\frac{40.6}{81.2}=\frac{1}{2}$

$\therefore n_f=2\eta_h$
Hence, the efficiency of a full wave rectifier is double of half wave-rectifier.

The logic gates giving output '

$1$ ' for the inputs of '

$1$ ' and '

$0$ ' are

0%
AND and OR
0%
OR and NOR
0%
NAND and NOR
0%
NAND and OR
0%
AND and NOR

Explanation

Boolean expression of OR gate

$Y=A+B$
and Boolean expression of NAND gate

$Y=\overline { A\cdot B }$
i.e., the logic gate giving output

$1$ for the inputs of

$1$ and

$0$ are NAND and OR.

Consider the circuit, the current through the Zener diode is

0%
$20\ mA$
0%
$10\ mA$
0%
$15\ mA$
0%
$40\ mA$

Explanation

Voltage across Zener diode is constant

$i_{R_2}=\dfrac{20}{2000}=0.01 A$

$i_{R_1}=\dfrac{(40-20)}{2000}=0.01 A$

A laser device produces amplification in the

0%
Microwave region
0%
Ultraviolet or visible region
0%
Infrared region
0%
None of the above

For given logic diagram, output

$F = 1$ , then inputs are:

0%
$A = 0, B = 0, C = 0$
0%
$A = 0, B = 1, C = 0$
0%
$A = 1, B = 1, C = 1$
0%
$A = 0, B = 0, C = 1$

Explanation

When

$A = 0, B = 1$ and

$C = 0$ , then output becomes

$1$ .

The following circuit represents.

0%
OR gate
0%
XOR gate
0%
AND gate
0%
NAND gate

Explanation

Output of upper AND gate

$=\bar{A}B$
Output of lower AND gate

$=A\bar{B}$
Thus, output of OR gate

$=\bar{A}B+A\bar{B}$
This is Boolean expression for XOR gate.

Which logic gates mentioned below have the output value '0' when both the inputs are 1

0%
OR , NAND
0%
AND , NOR
0%
AND , OR
0%
NOR , NAND

The following logic circuit represents

0%
NAND gate with output $O=\overline { X } +\overline { Y }$
0%
NOR gate with output $O=\overline { X+Y }$
0%
NAND gate with output $O=\overline { X-Y }$
0%
NOR gate with output $O=\overline { X } .\overline { Y }$

Explanation

The given logic circuit is the combination of OR and NOT gates. So it should be the NOR gate. Besides, the NAND gate is the combination of AND and NOT gates.

The output of NOR gate will be

$O=\overline{X+Y}$ and output of the NAND gate will be

$O=\overline{XY}=\overline X+\overline Y$ (by de Morgan's law)

The current gain of a transistor in common emitter mode is

$35$ . The change in collector current is

$140$ mV at constant collector to emitter voltage. The change in the base current will be.

0%
$10$ mA
0%
$2$ mA
0%
$0.1$ mA
0%
$4$ mA

Explanation

Current gain of a transistor in CE mode is given by

$\beta =\displaystyle\left(\displaystyle\frac{\Delta I_C}{\Delta I_B}\right)_{V_{CE}=constant}$

$\therefore \Delta I_B=\displaystyle\frac{\Delta I_C}{\beta}=\frac{140\times 10^{-3}}{35}$

$=4\times 10^{-3}A=4mA$ .

Lasers used in communication system are usually

0%
Ruby lasers
0%
He-Ne laser
0%
$CO_2$
0%
Semiconductor

$\overline { X }$

$\overline { X }$

$P=\overline { X } +Y$

$Q=\overline { X+Y }$

$R=\overline { P+Q }$