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CBSE Questions for Class 12 Engineering Physics Semiconductor Electronics: Materials,Devices And Simple Circuits Quiz 10 - MCQExams.com
CBSE
Class 12 Engineering Physics
Semiconductor Electronics: Materials,Devices And Simple Circuits
Quiz 10
The following configuration of gate equivalent to :
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NAND
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XOR
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OR
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None of these
Explanation
The given output equation can also be written as
$$Y=\left( A+B \right) \cdot \left( \bar { A } +\bar { B } \right) $$ (Demorgan's theorem)
$$\Rightarrow Y=A\bar { A } +A\bar { B } +B\bar { A } +B\bar { B } $$
$$\Rightarrow Y=0+A\bar { B } +\bar { A } B+0$$
$$\Rightarrow Y=\bar { A } B+A\bar { B } $$
This is the expression for XOR gate.
The combination of gates shown in the figure below produces.
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NOR gate
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OR gate
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AND gate
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XOR gate
Explanation
Here, the output of these gate
$$Y = \overline {\overline {A} - \overline {B}}$$
But according to Boolean algebra,
$$\overline {A}\cdot \overline {B} = \overline {A + B}$$
$$\therefore Y = \overline {\overline {A + B}} = A + B$$
or $$Y = A + B$$
It meas the whole circuit of gates behaves as OR gate.
In the circuit diagram, the current through the Zener diode is :
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$$10 mA$$
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$$3.33 mA$$
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$$6.67 mA$$
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$$0 mA$$
Explanation
The voltage drop across $${ R }_{ 2 }$$ is
$${ V }_{ { R }_{ 2 } }={ V }_{ z }=10 V$$
The current through $${ R }_{ 2 }$$ is
$${ I }_{ { R }_{ 2 } }=\dfrac { { V }_{ { R }_{ 2 } } }{ { R }_{ 2 } } =\dfrac { 10 }{ 1500 } =0.667\times { 10 }^{ -2 }A$$
$$=6.67\times { 10 }^{ -3 }A=6.67 mA$$
The voltage drop across $${ R }_{ 1 }$$ is
$${ V }_{ { R }_{ 1 } }=15 V - { V }_{ { R }_{ 2 } }=15 V-10 V=5 V$$
The current through $${ R }_{ 1 }$$ is
$${ I }_{ { R }_{ 1 } }=\dfrac { { V }_{ { R }_{ 1 } } }{ { R }_{ 1 } } =\dfrac { 5V }{ 500\Omega } ={ 10 }^{ -3 }A=10\times { 10 }^{ -3 }=10 mA$$
The current through Zener diode is
$${ I }_{ z }={ I }_{ { R }_{ 1 } }-{ I }_{ { R }_{ 2 } }=\left( 10-6.67 \right) mA=3.33 mA$$
Identify the mismatched pair from the following
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zener diode : voltage regulator
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germanium doped with phosphorous : n-type semiconductor
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semiconductor : band gap > 3 eV
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p-n junction diode : rectifier
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silicon doped with aluminium : p-type semiconductor
Explanation
For semiconductor band gap is $$<3eV$$ so given option is incorrect.
When zener dioode is operated in breakdown region, voltge across it remains constant even if current through it changes by large amount.
Germanium when doped with phosphorous forms n-type semiconductor and silicon when doped with aluminum forms p-type.
p-n junction can be used as half wave or full wave rectifier.
The circuit gives the output as that of:
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AND gate
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OR gate
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NAND gate
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NOR gate
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NOT gate
Explanation
$$Y=\overline{\overline{A\cdot B}+\overline{C}}=\overline{\overline{A\cdot B}}+\overline{\overline{C}}$$
$$=A\cdot B\cdot C=$$AND gate
Output is high only when all inputs are high as that of AND gate.
The circuit is equivalent to
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NOR gate
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AND gate
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NAND gate
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OR gate
Explanation
$$A$$ and $$B$$ are the two points on a uniform ring of radius $$r$$. The resistance of the rings is $$R$$ and $$\angle AOB = \theta$$ as shown in the figure. The equivalent resistance between points $$A$$ and $$B$$ is _____
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$$\dfrac {R(2\pi - \theta)}{4\pi}$$
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$$\dfrac {R\theta}{2\pi}$$
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$$R\left (1 - \dfrac {\theta}{2\pi}\right )$$
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$$\dfrac {R}{4\pi^{2}} (2\pi - \theta)\theta$$
Explanation
Consider the ring as two parts as two resistances joined in parallel between two points $$A$$ and $$B$$, then two resistance would be
$$R_{1} = \dfrac {2\pi r} \cdot r\theta = \dfrac {R}{2\pi}\theta$$
and $$R_{2} = \dfrac {R}{2\pi r} r (2\pi - \theta)$$
$$= \dfrac {R}{2\pi} (2\pi - \theta)$$
Now, equivalent or effective resistance between $$A$$ and $$B$$
$$R_{eq} = \dfrac {R_{1}\times R_{2}}{R_{1} + R_{2}}$$
$$\Rightarrow R_{eq} = \dfrac {\dfrac {R}{2\pi}\theta \times \dfrac {R}{2\pi}(2\pi - \theta)}{\dfrac {R}{2\pi}[\theta + 2\pi - \theta]}$$
$$= \left [\dfrac {\dfrac {R^{2}\theta (2\pi - \theta)}{4\pi^{2}}}{\dfrac {2\pi R}{2\pi}}\right ]$$
$$= \dfrac {R^{2}\theta (2\pi - \theta)}{4\pi^{2}} \times \dfrac {2\pi}{2\pi R}$$
$$= \dfrac {R\theta (2\pi - \theta)}{4\pi^{2}}$$.
Name the gate, which represents the Boolean expression $$Y = \overline{A\cdot B}$$
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NAND
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AND
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NOT
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NOR
Explanation
Boolean equation for NAND gate is $$Y = \overline{A.B}$$
The logic gates giving output '$$1$$' for the inputs of '$$1$$' and '$$0$$' are
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AND and OR
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OR and NOR
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NAND and NOR
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NAND and OR
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AND and NOR
Explanation
Boolean expression of OR gate
$$Y=A+B$$
and Boolean expression of NAND gate
$$Y=\overline { A\cdot B } $$
i.e., the logic gate giving output $$1$$ for the inputs of $$1$$ and $$0$$ are NAND and OR.
The inputs A, B and C to be given in order to get an output $$Y =1$$ from the following circuit are
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0, 1, 0
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1, 0, 0
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1, 0, 1
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1, 1, 0
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0, 0, 1
Explanation
$$(A+B) \cdot C=1$$
$$A\cdot C+B \cdot =1$$
$$A\cdot C= 1$$ or $$B\cdot C = 1$$
$$A=1, B= 0, C=1$$
So, (1, 0, 1) is correct option.
Consider the circuit, the current through the Zener diode is
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$$20\ mA$$
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$$10\ mA$$
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$$15\ mA$$
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$$40\ mA$$
Explanation
Voltage across Zener diode is constant
$$i_{R_2}=\dfrac{20}{2000}=0.01 A$$
$$i_{R_1}=\dfrac{(40-20)}{2000}=0.01 A$$
For which one of the following input combinations, the given logic circuit gives the output $$Y = 1$$?
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$$A = 0, B = 0, C = 0$$
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$$A = 0, B = 1, C = 0$$
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$$A = 0, B = 1, C = 1$$
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$$A = 1, B = 1, C = 1$$
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$$A = 1, B = 0, C = 1$$
Explanation
The logic circuit is
The output,
$$Y = \overline{\overline {\overline {A} \cdot B} + \overline {C}} = \overline {\overline {\overline {A} \cdot B} \cdot \overline {C}} = \overline {A} \cdot B\cdot C$$
$$[\overline {A + B} = \overline {A} \cdot \overline {B}$$, Demorgan's law]
when $$A = 0, B = 1, C = 1$$, then $$Y = 1 [\because \overline {A} = 1]$$.
In the adjoining circuit of logic gate, the output $$Y$$ becomes zero if the inputs are
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$$A = 1, B = 1, C = 0$$
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$$A = 0, B = 0, C = 0$$
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$$A = 0, B = 1, C = 1$$
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$$A = 1, B = 0, C = 0$$
Explanation
The output $$Y = \overline {(A\cdot B)\cdot C} = \overline {(A \cdot B)} + \overline {\overline {C}}$$
$$= \overline {(A\cdot B)} + C$$
So, $$Y = 0$$ if $$A = 1, B = 1$$ and $$C = 0$$.
A system of logic gates is shown in the figure. From the study of truth table it can be found that to produce a high output (1) at $$R$$, we must have
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$$X=0,Y=1$$
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$$X=1,Y=1$$
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$$X=1,Y=0$$
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$$X=0,Y=0$$
Explanation
The truth table can be written as
$$X$$
$$Y$$
$$\overline { X } $$
$$\overline { X } $$
$$P=\overline { X } +Y$$
$$Q=\overline { X+Y } $$
$$R=\overline { P+Q } $$
0
1
1
0
1
1
0
1
1
0
0
1
1
0
1
0
0
1
0
0
1
0
0
1
1
1
1
0
So, $$X=1,Y=0$$ gives output $$R=1$$
The following configuration of gates is equivalent to
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XOR
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NAND
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OR
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None of these
Explanation
The output $$Y$$ of the following gates
$$Y =\overline {\overline {X}}\overline {\overline {A + B}} = A + B$$
This is the Boolean expression for $$OR$$ gate.
The following logic circuit represents
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NAND gate with output $$O=\overline { X } +\overline { Y } $$
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NOR gate with output $$O=\overline { X+Y } $$
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NAND gate with output $$O=\overline { X-Y } $$
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NOR gate with output $$O=\overline { X } .\overline { Y } $$
Explanation
The given logic circuit is the combination of OR and NOT gates. So it should be the NOR gate. Besides, the NAND gate is the combination of AND and NOT gates.
The output of NOR gate will be $$O=\overline{X+Y}$$ and output of the NAND gate will be $$O=\overline{XY}=\overline X+\overline Y$$ (by de Morgan's law)
The following truth table is for which gate ?
A
B
Y=A + B
0
0
0
0
1
1
1
0
1
1
1
1
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AND
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OR
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NOR
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NAND
Explanation
R.E.F image
$$ F = A+B $$
$$ A $$ $$ B $$
$$A+B $$
$$0$$ $$0$$
$$0$$
$$0$$ $$1$$
$$1$$
$$1$$ $$0$$
$$1$$
$$1$$ $$1$$
$$1$$
Select the output $$Y$$ of the combination of gates shown in figure for inputs $$A = 1, B = 0; A = 1, B = 1$$ and $$A = 0, B = 0$$ respectively.
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$$(0, 1, 1)$$
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$$(1, 0, 1)$$
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$$(1, 1, 1)$$
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$$(1, 0, 0)$$
Explanation
Each gate in the above circuit is a NAND gate which gives output as 0 only when both the inputs are 1 while gives 0 in rest of the cases.
Truth table of the circuit is shown above which implies that option D is correct.
The arrangement shown in figure performs the logic function of
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OR gate
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XNOR gate
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AND gate
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NAND gate
The diagram of a logic gate circuit is given below. The output $$Y$$ of the circuit is represented by
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$$A\cdot (B + C)$$
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$$A\cdot (B\cdot C)$$
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$$A + (B\cdot C)$$
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$$A + (B + C)$$
Explanation
Output of upper OR gate $$= A + B$$
Output of lower OR gate $$= A + C$$
Net output $$Y = (A + B)(A + C)$$
$$= AA + AC + BA + BC$$
$$= A(1 + C) + BA + BC [\because AA = A]$$
$$= A + BA + BC [\because 1 + C = 1]$$
$$= A(1 + B) + BC [\because 1 + B = 1]$$
$$= A + BC = A + (B\cdot C)$$.
For given logic diagram, output $$F = 1$$, then inputs are:
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$$A = 0, B = 0, C = 0$$
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$$A = 0, B = 1, C = 0$$
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$$A = 1, B = 1, C = 1$$
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$$A = 0, B = 0, C = 1$$
Explanation
When $$A = 0, B = 1$$ and $$C = 0$$, then output becomes $$1$$.
The following circuit represents.
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OR gate
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XOR gate
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AND gate
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NAND gate
Explanation
Output of upper AND gate $$=\bar{A}B$$
Output of lower AND gate $$=A\bar{B}$$
Thus, output of OR gate $$=\bar{A}B+A\bar{B}$$
This is Boolean expression for XOR gate.
Identify the gate used in the following diagram.
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AND
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OR
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NAND
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NOR
Explanation
Truth table:-
A
B
output
1
1
1
0
0
0
1
0
0
Truth table corresponds to an AND gate.
A photodiode is symbolised by the graphic.
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0%
0%
0%
In a solid, an unfilled vacancy in an electronic energy level is called.
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Hole
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Majority carrier
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Minority carrier
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Electron
What will be the current flowing through the $$6K\Omega$$ resistor in the circuit shown, where the breakdown voltage of the zener is $$6$$V?
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$$\displaystyle\frac{2}{3}$$mA
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$$1$$mA
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$$10$$mA
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$$\displaystyle\frac{3}{2}$$mA
Explanation
$$\because$$ Zener break done $$=6$$V
Sp potential across $$4K\Omega =6$$V
and potential across $$6K\Omega =(10-6)=4$$V
Current through the $$6K\Omega =\displaystyle\frac{4}{6000}A\Rightarrow \displaystyle\frac{2}{3000}A=\frac{2}{3}$$mA.
Which logic gate is represented by the following logic gates?
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NOR
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NAND
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AND
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OR
Explanation
The initial two gates are the NOT gates. They provide the inverse of the input. The output of the NOT gate is fed to the NOR gate. So, the truth table for the inputs to the logic circuit is as given below:
Truth table:
A
B
Y
0
0
0
0
1
0
1
0
0
1
1
1
The truth table shown above is for the AND gate.
A pure semiconductor is __________.
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an extrinsic semiconductor
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an intrinsic semiconductor
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p-type semiconductor
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n-type semiconductor
Explanation
A pure semiconductor is "an intrinsic semiconductor"
Which of following gates produces output of $$1$$?
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0%
0%
0%
Explanation
For (A), NAND Gate, output will be $$Y = \overline {1.1} = \bar 1 = 0$$
For (B), NOR Gate, output will be $$Y = \overline{0+0} = \bar 0 = 1$$
For (C), AND Gate, output will be $$Y= {1.0} = 0$$
For (D), OR Gate, output will be $$Y = {0+0} = 0$$
Hence, option (B) is the correct one.
A hole is drilled in a copper sheet. The diameter of the hole is 4.24 cm at 27.0$$^{\circ}$$C. What is the change in the diameter of the hole when the sheet is heated to 227$$^{\circ}$$C? Coefficient of linear expansion of copper is 1.70 x 10$$^{-5}$$
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$$1.44 \times 10^{-2}$$ cm
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$$2.44 \times 10^{-3}$$ cm
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$$1.44\times 10^{-2}$$mm
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$$2.44 \times 10^{-3}$$ mm
Explanation
$$D_2=4.24cm$$
Initial Area of the hole $$(A_0)=\pi r^2=22/7(4.24/2)^2\\=4.494\pi cm^2$$
Initial temp. $$(T_1)=27°=27+273=300K$$
Final temp. $$(T_2)=227°=227+273=500K$$
Coefficientof linear exp. $$(O)=1.7\times 10^{-5}/°C$$
Superficial expansion $$(b)=2\times $$ Linear expansion
$$=2\times1.7\times10^{-5}°C\\=3.4\times 10^{-5}°C$$
Use formula
$$A=A_0(1+b\Delta T)\\A=4.49\pi[1+3.4\times10^{-5}\times(500-300)]\\ A=4.494\pi[1+0.0068]\\A=4.525cm^2=\pi D 2^2/$\\B2^2=4.523\times4\\ D2=4.2544cm$$
Change in diameter $$=\Delta D=D_2-D_1\\=4.2544-4.24\\=0.0144cm$$
With increase in temperature the conductivity of?
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Metals increases and of semiconductor decreases
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Semiconductors increases and of metals decreases
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In both metals and semiconductors increases
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In both metal and semiconductor decreases
Explanation
As the temperature increases, more electrons get the energy to jump from Conduction band to valence band, and thereby increases the conductivity of the semiconductor.
In metal, resistance increases with increase in temperature hence conductivity decreases.
So, option $$(B)$$ is correct.
If the load resistance decreases in a zener regulator, the zener current
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Decreases
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Stays the same
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Increases
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Equals the source voltage divided by the series resistance
Explanation
The load current is given by $$I_L=\dfrac{V_z}{R_L}$$ and the zener current is given by $$I_z=I_s-I_L$$. Thus, if the load resistance decreases, load current increases. This in turn will reduce the zener current
Diffusion is the process of.
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Rarefaction of particles
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Movement of particles through a semipermeable membrane
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Movement of particles from higher concentration to lower concentration
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Accumulation of particles on a solid surface
Explanation
Diffusion is a physical process in which molecules move from area of higher concentration to area of lower concentration.
The logic circuit shown in the figure represents characteristic of which logic gate?
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OR gate
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NOR gate
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AND gate
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NAND gate
Explanation
$$C=A'+B'$$
By De-Morgan's theorem,
$$(AB)'=A'+B'\\ \therefore C=(AB)'$$
Therefore, NAND gate.
What is true about the breakdown voltage in a zener diode?
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It decreases when current increases.
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It destroys the diode.
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It equals the current times the resistance.
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It is approximately constant.
Explanation
As the current in the zener diode increases, the voltage across the diode remains constant. This voltage will be equal to the zener breakdown voltage
A heater is designed to operate with a power of $$1000\ W$$ in a $$100\ V$$ line. It is connected in combination with a resistance of $$10\Omega$$ and a resistance $$R$$, to a $$100\ V$$ mains as shown in the figure. What will be the value of $$R$$ so that the heater operates with a power of $$62.5\ W$$?
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$$15\Omega$$
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$$10\Omega$$
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$$5\Omega$$
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$$25\Omega$$
Explanation
Given that,
Power rating of a heater, $$P=1000\ W$$
Voltage rating of heater, $$V=100\ V$$
$$\therefore$$ Resistance of heater, $$R= \dfrac{V^2}P= \dfrac{100\times100}{1000}=10 \Omega $$
Given that, Power at which heater operates ,$$P'=62.5\ W$$
Hence, Voltage drop across the heater, $$V'=\sqrt{RP'}=\sqrt{10\times62.5}=25 \ V$$
Since the voltage drop across the heater is $$25\ V$$ hence voltage drop across $$10\ Ω$$ resistor is $$, V_r= (100-25) = 75\ V$$
Current in the circuit, $$I=\dfrac{V_r}R= \dfrac{75}{10}=7.5\ A$$
Further, the current divides into two parts.
Let $$I_1$$ be the current
that passes through the heater.
$$\therefore 25=I_1\times 10\implies I_1=2.5\ A$$
Hence, current through resistance $$R$$ is, $$i=7.5-2.5=5\ A$$
Applying Ohm's law across $$R$$, we get
$$\therefore iR=25 \implies R=\dfrac{25}5=5\Omega $$
Hence, option $$(C)$$ is correct.
The current flowing through the zener diode in figure is:
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$$20\,mA$$
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$$25\,mA$$
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$$15\,mA$$
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$$5\,mA$$
Explanation
Using Kirchoff's current law:
$$\dfrac{{10 - 5}}{{500}} = {I_1} + \dfrac{5}{{1000}}$$
$$\dfrac{5}{{500}} - \dfrac{5}{{1000}} = {I_1}$$
$$\dfrac{{10 - 5}}{{1000}} = {I_1}$$
$$\boxed{5\,mA = {I_1}}$$
The graph given represents the I-V characteristics of a Zener diode. Which part of the characteristic curve is most relevant for its operation as a voltage regulator?
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$$ab$$
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$$bc$$
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$$cd$$
0%
$$de$$
Explanation
Hence ans should be $$de$$ bez zenve diode acts as voltage congulator is reverse biasing where in chore voltage tange called zener breatdown voltage
Zener diodes with breakdown voltage ranging over 2V- 200 V are commercially available. Breakdown voltage of a zener diode
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Increases with increasing doping concentration
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Decreases with increasing doping concentration
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Does not depend on doping concentration
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May increases or decreases with increasing doping concentration
Explanation
For Zener Diodes, the breakdown voltage decreases with increasing doping concentration.
When the source voltage increases in a zener regulator, which of these currents remains approximately constant?
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Series current
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Zener current
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Load current
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Total current
Explanation
The load current is independent of the source voltage variations and hence remains a constant
There are two holes O1 and O2 in a tank of height H.The water emerging from O1 and O2 strikes the ground at the same points, as shown in fig.then.
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$$H = {h_1} + {h_2}$$
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$$H = {h_1} - {h_2}$$
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$$H = {h_1} {h_2}$$
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$$H = {h_1}/ {h_2}$$
Which of the following is a correct statement about current carrying conductor?
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On increasing temperature drifts speed of free electron decreases
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On increasing temperature drift speed of free electron increases
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On increasing temperature, drift speed of free electron remains same.
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On increasing P.D. average kinetic energy of electron decreases ( Neglected heating effect of electric current)
Explanation
$$vd =\dfrac{et}{m} E$$
$$t \downarrow $$ as $$T \uparrow ]$$
As the
temperature increases
, the thermal agitation of the
electrons increases
thereby,
increasing
the number of collisions. Hence,
drift velocity of
the
electrons decreases
.
In the circuit shown in figure, the diode is ideal. The potential difference between A and B is?
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$$V/4$$
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V
0%
Zero
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$$V/2$$
Explanation
Diode short circuits the resistance of $$2\Omega$$.
$$ \therefore$$Voltage across points A and B will be
$$V_1=\dfrac{\dfrac{2}{3}}{\dfrac{2}{3}+2}\times V=\dfrac{V}{4}$$.
The correct output for the given circuit is:
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0%
0%
0%
Explanation
$$0-{T}_{0}$$ $$C=(\overline { 1+1 } .1)=0$$
$${T}_{0}-2{T}_{0}$$ $$C=(\overline { 1+1 } .1)=0$$
$$2{T}_{0}-\infty $$ $$C=(\overline { 1+0 } .1)=0$$
Read the following diagram and tell which of the following statements are true:
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In circuit 1 lamp does not glow but in circuit 2 lamp glows
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In circuit 1 as well as 2 lamp does not glow
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In circuit 1 lamp glows but in 2 lamp does not glow
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In both circuit lamp glows
Explanation
In (i) circuit, the emitter base junction is not biased, so no current flows across L; hence lamp L does not light. In (ii) circuit, the emitter base junction is forward biased, so emitter and hence collector current flows and lamp L lights up.
Germanium and silicon junction diodes are connected in parallel. These are connected in series with a resistance $$R$$, a milliammeter $$(mA)$$ and a key $$(K)$$ as shown in Fig. When key $$(K)$$ is closed a current begins to flow in the milliammeter. The potential drop across the germanium diode is then
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$$0.3 V$$
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$$0.7 V$$
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$$1.1 V$$
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$$12 V$$
Explanation
In Fig. germanium diode is reverse biased and silicon diode is forward biased. Therefore, there will be no current in the branch of germanium diode. The potential barrier of silicon diode is $$0.7 V$$. Therefore, for conduction minimum potential difference across silicon is $$0.7 V$$.
Maximum potential difference across resistance, $$R = 12 - 0.7 = 11.3 V.$$
For the plate voltage, the plate current in a triode valve is maximum when the potential of :
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The gird is positive and plate is negative
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The grid is zero and plate is positive
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The grid is negative and plate is positive
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The grid is positive and plate is positive
Explanation
When grid is given potential more electrons will cross the grid to reach the positive plate $$p$$. Hence current increases.
The electrical conductivity of a semiconductor increases when emf radiation of wavelength shorter the $$2480$$ nm is incident in it. The band gap (in eV) for the semiconductor is?
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$$0.9$$
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$$0.7$$
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$$0.5$$
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$$1.1$$
In a p-n junction diode, not connected to any circuit
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The potential is the same everywhere
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The p-type side is at a higher potential than the n-type side
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There is an electric field at the junction directed from the n-type side to the p-type side
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There is an electric field at the junction directed from the p-type side to the n-type side
Explanation
In pn function diode p side of diode (+ve side) attract $$-ve$$ charge and due to induct ion opposite charge $$+ve$$ charge appraises on n side which produce potential barrierand we know that charge separation produce electric fields from inside to p side of diode.
Consider two $$npn$$ transistors as shown in figure. If $$0$$ volts corresponds to false and $$5$$ volts correspond to true then the output at $$C$$ correspond to true then the output at $$C$$ corresponds to:
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$$A\ NAND\ B$$
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$$A\ OR\ B$$
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$$A$$ and $$B$$
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$$A\ NOR\ B$$
Explanation
There are two individual NOT gates and when they combine they form a NAND gate.
0:0:1
1
2
3
4
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Practice Class 12 Engineering Physics Quiz Questions and Answers
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