MCQ Questions for Class 12 Engineering Physics Semiconductor Electronics: Materials,Devices And Simple Circuits Quiz 15

A NOR gate and a NAND gate are connected as shown in the figure. Two different sets of inputs are given to this setup. In the first case, the inputs to the gates are

$A=0,B=0,C=0$ . In the second case, the inputs are

$A=1,B=0,C=1$ . The output

$D$ in the first case and second case respectively are:

0%
$0$ and $0$
0%
$0$ and $1$
0%
$1$ and $0$
0%
$1$ and $1$

Explanation

In first case

$A=0,B=0$

$\therefore$ Output of NOR gate,

$Y=\overline { A+B } =1$
This output is the input for NAND gate ie,

$Y=1$ and

$C=0$

$\therefore$

$D=\overline { Y.C } =1$
In second case

$A=1, B=0$

$\therefore$ Output of NOR Gate,

$Y=\overline { A+B } =0$
This output is the input for NAND gate ie

$Y=0$ and

$C=1$

$\therefore$

$D=\overline { Y.C } =1$

Identify the semiconductor devices whose characteristics are given above in the order

$(a), (b), (c), (d):$

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Simple diode, Zener diode, Solar cell, Light dependent resistance
0%
Zener diode, Simple diode, Light dependent resistance, Solar cell
0%
Solar cell, Light dependent resistance, Zener diode, Simple diode
0%
Zener diode, Solar cell, Simple diode, Light dependent resistance

What is the value of output voltage

$v _ { 0 }$ in the circuit shown in the figure

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6V
0%
15V
0%
20V
0%
26V

A 5 V zener diode is used to regulate the voltage across load resistor

$R_L$ and the input voltage varies in between 10 V to 15 V. The load current also varies from 5 mA to 50 mA. Find the value of series resistance R.

Given,

$I_Z(min)=20 mA$

0%
$70 \Omega$
0%
$90.91 \Omega$
0%
$142.86 \Omega$
0%
$71.43 \Omega$

Explanation

The zener current

$I_Z$ will minimum when the load resistance is maximum and the input voltage will also minimum.

Thus,

$I_T=I_Z(min)+I_L(max)$

By KVL,

$V_{in}(min)-V_Z=I_TR=[I_Z(min)+I_L(max)]R$

so,

$R=\dfrac{10-5}{(20+50)\times 10^{-3}}=71.43 \Omega$

A zener diode voltage regulator operated in the range

$120-180\ V$ produces a constant supply of

$110\ V$ and

$250\ mA$ to the load. If the maximum current is to be equally shared between the load and zener, then the values of series resistance (

$\displaystyle { R }_{ S }$ ) and load resistance (

$\displaystyle { R }_{ L }$ ) are:

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$\displaystyle { R }_{ L }=70\ \Omega ;{ R }_{ S }=280\ \Omega$
0%
$\displaystyle { R }_{ L }=440\ \Omega ;{ R }_{ S }=140\ \Omega$
0%
$\displaystyle { R }_{ L }=140\ \Omega ;{ R }_{ S }=440\ \Omega$
0%
$\displaystyle { R }_{ L }=280\ \Omega ;{ R }_{ S }=70\ \Omega$

Explanation

The resistance offered by Zener diode will be:

${ R }_{ Z }=\dfrac { 110 }{ 0.25 } \ \Omega =440\ \Omega$

Hence, for equal current in load and Zener diode,

${ R }_{ L }={ R }_{ Z }=440\ \Omega$

Now, total resistance will be:

$\dfrac { 440 }{ 2 } +{ R }_{ S }={ R }_{ S }+220$

Since current through Zener diode is

$0.25A$ , current through combination will be:

$0.25\ A\times 2=0.5\ A$ .

Hence, for current to be maximum, the maximum voltage can be

$180\ V$ .

Therefore,

$180=0.5({ R }_{ S }+220)$

${ R }_{ S }=140\ \Omega$

Find the minimum and maximum load currents for which the zener diode as shown in figure will maintain regulation. Given,

$V_Z=10 V, R_Z=0 \Omega, R=450 \Omega, I_Z(min)=2 mA$ and

$I_Z(max)=60 mA$

0%
$0 mA, 33.3 mA$
0%
$31.3 mA, 0 mA$
0%
$2 mA, 31.3 mA$
0%
$31.3 mA, 31.3 mA$

Consider an open-circuited p-n junction in thermal equilibrium. Let

$J_{p,drift}$ and

$J_{p,diff}$ be the hole drift and diffusion current densities, respectively, and let

$J_{n,drift}$ and

$J_{n,diff}$ be the corresponding electron current densities. Of the following equalities, mark false,at all points in the p-n junction structure.

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$J_{n,drift}$ + $J_{p,diff}$ = - $J_{n,diff} - J_{p,diff}$
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$J_{n,drift}$ + $J_{n,diff}$ = $J_{p,drift} + J_{p,diff}$
0%
$J_{n,drift}$ = $J_{n,diff}$ and $J_{p,drift} = J_{p,diff}$
0%
$J_{n,drift}$ + $J_{p,diff}$ = - $J_{n,drift} - J_{p,diff}$

In the circuit diagram given A and B are switches. The logic operation, which the switches can perform, is.....?

0%
NAND
0%
OR
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AND
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None of these

The waveforms A and B given below are given as input to a NAND gate. Then, its logic output

$y$ is

0%
for $t_1$ to $t_2 ; y=0$
0%
for $t_2$ to $t_3 ; y=1$
0%
for $t_3$ to $t_4 ; y=1$
0%
for $t_4$ to $t_5 ; y=0$
0%
for $t_5$ to $t_6 ; y=0$

Explanation

Time	A	B	$Y=\overline{AB}$
$t_1$	1	0	1
$t_2$	1	1	0
$t_3$	1	1	0
$t_4$	0	1	1
$t_5$	1	0	1
$t_6$	1	1	0

NAND gate is the combination of AND and NOT gate and the output of the two inputs (A and B) NAND gate is

$Y=\overline{AB}$

Here, the truth table for the NAND gate will be the following table,

(note 1 for high signal and 0 for low signal)

When a semiconductor is heated, its resistance.

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Remains the same
0%
Decreases
0%
Increases
0%
May increases or decreases depending on the semiconductor

Truth table for the given circuit will be

Explanation

$x$	$y$	$\overline{x}$	$a=x.y$	$b=\overline{x}.y$	$z=\overline{a.b}$
0	0	1	0	0	1
0	1	1	0	1	1
1	0	0	0	0	1
1	1	0	1	0	1

Two junction diodes one of germanium

$(Ge)$ and other of silicon

$(Si)$ are connected as shown in figure to a battery of emf

$12\ v$ and a load resistance

$10\ k\ \Omega$ . The germanium diode conducts at

$0.3\ V$ and silicon diode at

$0.7\ V$ . When a current flows in the circuit, then the potential of terminal

$Y$ will be:

0%
$12\ V$
0%
$11\ V$
0%
$11.3\ V$
0%
$11.7\ V$

Explanation

Ge conducts at

$0.3\ V$ and

$Si$ Conducts at

$0.7\ V$ . Both

$Ge$ and

$Si$ are connected in parallel. When current begins to flow, then the potential difference remains at

$0.3\ V$ , so no current flows through Si-diode.

$\therefore$ Potential difference across resistive load

$= 12 - 0.3$

$= 11.7\ V$

$\therefore$ Potential of

$Y = 11.7\ V$ .

Mobilities of electrons and holes in a sample of intrinsic germanium at room temperature are

$0.36m^2V^{-1}s^{-1}$ and

$0.17m^2V^{-1}s^{-1}$ . The electron and hole densities are each equal to

$2.5\times 10^{19}m^3$ . The electrical conductivity of germanium is

0%
$4.24Sm^{-1}$
0%
$2.12Sm^{-1}$
0%
$1.09Sm^{-1}$
0%
$0.47Sm^{-1}$

Explanation

Given in question,

Mobilities of electrons

$\mu_e=0.36\times m^2V^{-1}s^{-1}$

Mobilities o holes

$\mu_h=0.17\times m^2V^{-1}s^{-1}$

densities of electron

$=$ densities of holes

$=2.5\times10^{19}m^{-3}$

As we know, conductivity,

$\sigma = \dfrac{1}{p}=e({\mu}_e n_e+{\mu}_n n_n)$

$=1.6\times 10^{-19}[0.36\times2.5\times10^{19}+0.17\times2.5\times 10^{19})]$

$=2.12 Sm^{-1}$

So the electrical conductivies of germanium is

$2.12Sm^{-1}$

Which of the following is NOT true about a zener diode?

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It is used as a voltage regulator.
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It is forward biased.
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It is reverse biased.
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It has a breakdown voltage.

In a diode detector, output circuit consist of

$R=1M\Omega \quad and\quad C=1pF$ . Calculate the carrier frequency it can detect.

0%
$3 \times 10^ 6Hz$
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$1 \times 10^ 6Hz$
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$30 \times 10^ 6Hz$
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$4 \times 10^ 6Hz$

If the lattice constant of this semiconductor is decreased, then which of the following is correct?

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All $E_{c}, E_{g}, E_{v}$ increase
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$E_{c}$ and $E_{v}$ increases but $E_{g}$ decrease
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$E_{c}$ and $E_{v}$ decreases but $E_{g}$ increase
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All $E_{c}, E_{g}, E_{v}$ decrease

A semiconductor X is made by doping a germanium crystal with arsenic

$(Z=33)$ . A second semiconductor Y is made by doping germanium with indium

$(Z=49)$ . The two are joined end to end and connected to a battery as shown. Which of the following statements is correct?

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X is P-type, Y is N-type and the junction is forward biased
0%
X is N-type, Y is P-type and the junction is forward biased
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X is P-type, Y is N-type and the junction is reverse biased
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X is N-type, Y is P-type and the junction is reverse biased

The electrical conductivity of a semiconductor increases when electromagnetic radiation of wavelength shorter than 2480nm is incident on it. The band gap(in eV) for the semiconductor is

0%
0.9
0%
0.7
0%
0.5
0%
0.1

There photo dlodes

$D_{1}, D_{2}$ and

$D_{3}$ are made of semiconductor having band gap

$2.5\ eV, 2\ eV$ and

$3\ eV$ respectively. Which one will be able to detect light of wavelength

$6000\ A^o$ ?

0%
$D_{1}$
0%
$D_{2}$
0%
$D_{3}$
0%
$D_{1}$ and $D_{2}$ both

Explanation

Given that,

Band gap of ${{D}_{1}}=2.5\,eV$

Band gap of ${{D}_{2}}=2\,eV$

Band gap of ${{D}_{3}}=3\,eV$

Wave length $\lambda =6000\overset{\circ }{\mathop{A}}\,$

Now, the wave length for $2.5\ eV$

${{\lambda }_{1}}=\dfrac{hc}{E}$

${{\lambda }_{1}}=\dfrac{6.6\times {{10}^{-34}}\times 3\times {{10}^{8}}}{2.5\times 1.6\times {{10}^{-19}}}$

${{\lambda }_{1}}=4.95\times {{10}^{-7}}\,m$

Now, for $2\ eV$

${{\lambda }_{2}}=\dfrac{hc}{E}$

${{\lambda }_{2}}=\dfrac{6.6\times {{10}^{-34}}\times 3\times {{10}^{8}}}{2\times 1.6\times {{10}^{-19}}}$

${{\lambda }_{2}}=6.2\times {{10}^{-7}}\,m$

Now, for $3\ eV$

${{\lambda }_{3}}=\dfrac{hc}{E}$

${{\lambda }_{3}}=\dfrac{6.6\times {{10}^{-34}}\times 3\times {{10}^{8}}}{3\times 1.6\times {{10}^{-19}}}$

${{\lambda }_{3}}=4.13\times {{10}^{-7}}\,m$

For detection of optical signal the wave length of incident energy radiation must be greater.

So, only ${{D}_{2}}$ can detect the radiation

The following configuration of gate is equivalent to:

0%
$NAND$
0%
$XOR$
0%
$OR$
0%
$None\ of\ these$

Explanation

A	B	Y
1	1	0
1	0	1
0	1	1
0	0	0

Here gate gives

$1$ only when there are odd

$1'$ s Hence, it is

$XOR$ gate equivalent option (B) is correct answer.
1396785_1027130_ans_239c416a9e694a49aa8b02b70022e3ef.png

If the revers bias voltage applied to a p-n junction diode is increased, its barrier capacitance would:

0%
increase
0%
decrease
0%
remain constant
0%
first increase then decrease

If no external voltage is applied across p-n junction, there would be

0%
no electric field across the junction
0%
an electric field pointing from n-type side across the junction
0%
an electric field pointing from p-type to n-type side across the juncrtion
0%
none of these

The output of the gate is low when at least one of the its input is high. This is true for:-

0%
NOR
0%
OR
0%
AND
0%
NAND

In a zener regulated power supply of a zener diode with

$V_z$ = 6V is used for regulation. The load current is to be 4 mA and the unregulated input is 10 V. The value of series resistor

$R_s$ is

0%
less than $5 \ \Omega$
0%
Infinite
0%
greater than 100 $\Omega$
0%
zero

The length of germanium rod is

$0.928cm$ and its area of cross-section is

$1\ mm^{2}$ . If for germanium

$n_1=2.5\times 10^{19}cm^{3}$ .

$\mu_{h}=0.19m^{2}V^{-1}s^{-1}$ . Its resistance is

0%
$2.5k\Omega$
0%
$4.0k\Omega$
0%
$5.0k\Omega$
0%
$10.0k\Omega$

In the figure shown, the maximum and minimum currents through Zener diode are

0%
5 mA, 1 mA
0%
14 mA, 6 mA
0%
14 mA, 5 mA
0%
9 mA, 1 mA

The current density (J) for an intrinsic semiconductor is given by which of the following equations?

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$j=n_1 . e . (\mu_e+\mu_h) . E$
0%
$j=n_1 . e . (\mu_e-\mu_h) . E$
0%
$j=\dfrac{n_1 . e . (\mu_e-\mu_h)} {E}$
0%
$j=\dfrac{E}{n_1 . e . (\mu_e+\mu_h)}$

The following data are for intrinsic germanium at 300 K.

$n_1 = 2.4 \times 10^{19} \ /m^3, \ \mu_e = 0.39m^2 \ / Vs, \ \mu_n = 0.19 m^2 \ /Vs$ . Calculate the conductivity of intrinsic germanium.

0%
$4.3 Sm^{-1}$
0%
$1.21 Sm^{-1}$
0%
$2.22 Sm^{-1}$
0%
$4.22 Sm^{-1}$

For inputs (A, B) and output (Y) of the following gate can be expressed as

0%
$A\oplus B$
0%
A.B
0%
A+ B
0%
$\ \overset { - }{ A }B +\overset { - }{ B }A$

A zener diode is specified as having a breakdown voltage of

$9.1 V$ , with a maximum power dissipation of

$364 \ mW$ . What is the maximum current the diode can handle?

0%
$40 \ mA$
0%
$60 \ mA$
0%
$50 \ mA$
0%
$45 \ mA$

If the lattice constant of this semiconductor is decreased, then which of the following is correct?

0%
All $E_c, E_g, E_v$ increase
0%
$E_c$ and $E_v$ increase but $E_g$ decreases
0%
$E_c$ and $E_v$ decrease but $E_g$ incerases
0%
All $E_c, E_g, E_v$ decrease

Evaluate:

0%
NAND
0%
AND
0%
NOR
0%
OR

The majority current in a

$p-n$ junction is

$:-$

0%
from the $n-$ side to the $p-$ side
0%
from the $p-$ side to the $n-$ side
0%
from the $n-$ side to the $p-$ side if the junction is forward $-$ biased and in the opposite direction if it is reverse biased
0%
from the $p-$ side to the $n-$ side if the junction is forward $-$ biased and in the opposite direction if it is reverse biased

The diode used in the circuit shown in the figure has a constant voltage drog currents and a maximum power rating of 100 mW. What should be the value r, connected in series with the diode, for obtaining maximum current l?

0%
200 $\Omega$
0%
6.67 $\Omega$
0%
5 $\Omega$
0%
1.5 $\Omega$

Silicon is a semiconductor. On adding a small quantity of arsenic to it its conductivity

0%
inceases
0%
decreases
0%
remaions the same
0%
becomes zero

The output in the figure is:-

0%
$\overline {AB}$
0%
$\overline {\overline A .\overline B }$
0%
$\overline {\overline {A.B} }$
0%
${\overline A .\overline B }$

Two wires A and B of same material and same mass have radius

$2$ r and r. If resistance of wire A is

$34\Omega$ , then resistance of B will be?

0%
$544\Omega$
0%
$272\Omega$
0%
$68\Omega$
0%
$17\Omega$

Explanation

The radius has a ratio of $2:1$ , therefore the cross-sectional area is of ratio $4:1.$

The resistance per unit length is therefore $1:4.$

Because we are told the mass is the same, wire $B$ , the smaller section wire will have to be $4$ times as long to have the same mass, neglecting the effects of any insulation on the mass.

So the final resistance of $B$ will be $16$ times the resistance of $A$ or $544$ Ohms.

If in a p-n junction diode, a square input signal of

$10 V$ is applied as shown. Then, the output singnal across

$RL$ will be :-

C and Si both have a same lattice structure, having 4 bonding electrons in each. However, C is insulator whereas Si is intrinsic semiconductor:-

0%
In case of C the valance bond is not completely filled at absolute zero temperature
0%
In the case of C, the conduction band is partly filled even at zero temperature
0%
The four bonding electron in case of C lies in the second orbit whereas in case of Si lies in third orbit
0%
The four bonding electron in case of C lies in third orbit whereas for Si they lie in fourth orbit

What is the output of the combination of the gates shown in fig. below ?

0%
$A + \overline{A.B}$
0%
$A + A. B$
0%
$(A + B) . (\overline{A . B})$
0%
$(A + B) (\overline{A + B})$

If in a p-n junction diode, a square input signal of

$10V$ is applied as shown. Then, the output signal across

${R}_{L}$ will be-

Shown in the figure is a combination of logic gates. The output values at

$P$ and

$Q$ are correctly represented by which of the following?

0%
$0,0$
0%
$1,1$
0%
$0,1$
0%
$1,0$

What is the output of the combination of the gates shown in fig. below ?

0%
$A + \overline{A . B}$
0%
$A + A. B$
0%
$(A + B) . (\overline{A. B})$
0%
$(A + B) (\overline{A + B})$

What is the output of the combination of the gates shown in fig. below ?

0%
$A + \overline{A . B}$
0%
$A + A. B$
0%
$(A + B) . (\overline{A . B})$
0%
$(A + B) (\overline{A + B})$

In the adjacent diagram A and B represent two inputs and C represent the output,
The circuit represents

0%
NOR gate
0%
AND gate
0%
NAND gate
0%
OR gate

In p - type semi conductor, there are

0%
immobile negative ions
0%
immobile positive ions
0%
no minority carriers
0%
holes as majority carriers

The combined network of the following NOR gates will behaves as

0%
AND gate
0%
XOR gate
0%
NOR gate
0%
NAND gate

The logic which produces LOW output when one of the input is HIGH and produces HIGH output only when all its inputs are LOW is called _.

0%
AND gate
0%
OR gate
0%
NOR gate
0%
NAND gate

For a diode connected in parallel with a resistor, which is the most likely current (I) -voltage (V) characteristics?

Explanation

When the value of V is +ve, the diode is forward biased. Thus, the current flowing through the diode is exponential and the current in the resistor varies linearly. Thus, the V−I characteristic is an exponential curve when

$V>0$

When the value of V is -ve, the diode is reverse biased. Thus, no current flows through it and the current in the resistor varies linearly with voltage (Ohm's law). Thus, the V−I characteristic is a straight line when

$V<0$

So, the correct answer is option (A).

In the resistance box, a double wired coil is fixed as shown in the figure so that :-

0%
The wire may not be heated
0%
The wire may not break easily
0%
Electromagnetic induction may increase
0%
Self induction in the coil may be negligible

CBSE Questions for Class 12 Engineering Physics Semiconductor Electronics: Materials,Devices And Simple Circuits Quiz 15 - MCQExams.com

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Practice Class 12 Engineering Physics Quiz Questions and Answers

CBSE Questions for Class 12 Engineering Physics Semiconductor Electronics: Materials,Devices And Simple Circuits Quiz 15 - MCQExams.com

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Practice Class 12 Engineering Physics Quiz Questions and Answers

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