an electron in the valence band.

an excess electron in covalent bond.

is a lightly doped junction diode.

MCQ Questions for Class 12 Engineering Physics Semiconductor Electronics: Materials,Devices And Simple Circuits Quiz 2

The following one represents logic addition is

0%
$1 + 1 = 2$
0%
$1 + 1 = 10$
0%
$1 + 1 = 1$
0%
$1 + 1 = 11$

Explanation

Logic addition is the addition of binary numbers, it is represented by

1 + 1 = 1

$1 + 1 = 1$

The logic gate represented in given figure is

0%
OR Gate
0%
NOT Gate
0%
NAND Gate
0%
XOR Gate

Explanation

P

$P$ is the output of the inputs signal

A

$A$ and

B

$B$ operating on a

N O R

$NOR$ gate. Then the signal

P

$P$ (A' and B') acts as input signal for the second

N O R

$NOR$ gate to give the output

Y

$Y$ .

Thus writing truth table for each step gives the table as shown above which resembles the truth table of an

O R

$OR$ gate for input signal

A

$A$ and

B

$B$ whereas the

Y

$Y$ as the output signal.

In the given circuit, the voltage across the voltage across the load is maintained at 12V. The current in the zener diode varies from 0-50 mA. What is the maximum watage of the diode?

0%
12 W
0%
6 W
0%
0.6 W
0%
1.2 W

The circuit as shown in figure, the equivalent gate is

0%
NOR gate
0%
OR gate
0%
AND gate
0%
NAND gate

Explanation

Let the outputs of individual gates be labelled as X, Y and Z respectively starting from left to right. we have:

$Z=\overline { Y } \\ Y=\overline { XX } =\overline { X } +\overline { X } =\overline { X } \\ X=\overline { A+B } \\ \Rightarrow Z=X=\overline { A+B }$ .

Thus, the combination behaves as NOR gate.

Which of the following contains a covalent bond?

0%
$copper$
0%
$NaCl$
0%
$germanium$
0%
$helium$

Explanation

A covalent bond is a chemical bond that involves the sharing of electron pairs between atoms. The stable balance of attractive and repulsive forces between atoms when they share electrons is known as covalent bonding. As the valency of germanium is $4$ , it can share $4$ electrons of neighboring atom to complete the octet. Hence, Ge has covalent bond. NaCl is an example of an ionic bond and helium and copper both have valency $2$ and $1$ respectively.

The bond, that exists in a semiconductor is

0%
covalent bond
0%
ionic bond
0%
metalic bond
0%
hydrogen bond

A hole is

0%
a positively charged electron.
0%
an electron in the valence band.
0%
an unfilled covalent bond.
0%
an excess electron in covalent bond.

The mobility of free electrons is greater than that of free holes because

0%
they carry negative charge
0%
they are light
0%
their mutual collisions are less
0%
they require low energy to continue their motion

In a metal, the separation between conduction band and valence band is of the order

0%
$100\ eV$
0%
$10\ eV$
0%
$0\ eV$
0%
$1\ eV$

Explanation

Energy band gap is the energy difference between conduction band and valence band, i. e., energy required to an electron to overcome the energy levels between conduction band and valence band. In conductors, electrons are loosely bound to the nucleus hence, can detach easily at room temperature also. A large number of free electrons thus, available are conduction electrons. The energy level of these electrons corresponds to the conduction level, hence valance level and conduction level are overlapped. Due to this, there is no gap between conduction band and valence band hence, for metals their separation is of the order of

$0\ eV$ .

The value indicated by Fermi energy level in an intrinsic semiconductor is

0%
the average energy of electrons and holes.
0%
the energy of electrons in conduction band.
0%
the energy of holes in valence band.
0%
the energy of forbidden region.

Explanation

In an intrinsic semiconductor,

$n = p$ , where,

$n$ is number of electrons and

$p$ is number of holes in intrinsic semiconductor.
This implies that there is an equal chance of finding an electron at the conduction band edge as there is of finding a hole at the valence band edge. Thus, the average energy level of electrons and holes is half of the energy band gap in intrinsic semiconductors. Also the Fermi energy level lie exactly in the middle of energy band gap in intrinsic semiconductors. Thus, the value indicated by Fermi energy level in an intrinsic semiconductor is the average energy of electrons and holes.

There is no hole current in conductors, because they have

0%
high conductivity
0%
high electron density
0%
no valence band
0%
overlapping of valence and conduction bands

Forbidden gap in a pure conductor is

0%
$0\ eV$
0%
$0.7\ eV$
0%
$1.1\ eV$
0%
$6\ eV$

Explanation

Forbidden band gap is the group of energy levels that cannot be occupied by the electrons, these energies lies in between conduction band and valence band. In pure conductors, electrons are loosely bound to the nucleus hence, can detach easily at room temperature also. A large number of free electrons thus, available are conduction electrons. The energy level of these electrons corresponds to the conduction level, hence valence level and conduction level are overlapped. Due to this, there is no forbidden band gap present in between conduction band and valence band hence, for metals the forbidden band gap is

$0\ eV$ .

The conduction band and valency band of a good conductor are

0%
well separated.
0%
just touch.
0%
very close.
0%
overlapped.

Which of the following are correct for insulators?

0%
The valence band is partially filled with electrons.
0%
The conduction band is partially filled with electrons.
0%
The conduction band is partially filled with electrons and valence band is empty.
0%
The conduction band is empty and the valence band is filled with electrons.

p-n junction diode acts as

0%
ohmic resistance
0%
non-ohmic resistance
0%
both A and B
0%
amplifier

Explanation

We know that in the case of metallic conductors, the potential difference varies in direct proportion to the current flowing. The $I-V$ graph of a ohmic conductor is a straight line. But, a p-n junction diode is not in according with Ohm's law. The current voltage characteristic curve of a p-n junction diode shows both forward bias as well as reverse bias characteristics as shown as in the graph.

When the conductivity of a semiconductor is only due to breaking of covalent bonds, the semiconductor is called

0%
n-type
0%
p-type
0%
intrinsic
0%
extrinsic

Explanation

At room temperature, in impure semiconductors some free charge carriers are available for conduction due to impurity atoms. But in pure, i.e., intrinsic semiconductors,

$n=p$ . Hence, at room temperature no free electrons are available for conduction. If the temperature is increased the covalent bonds will break and electrons will be freed, each electron will leave behind a hole and capture a new hole the process will continued and charge flows through intrinsic semiconductor. Thus, its conductivity is only due to breaking of covalent bonds.

The main cause of avalanche breakdown is

0%
ionisation by collision.
0%
high doping.
0%
recombination of electrons and holes.
0%
low doping.

The main cause of Zener breakdown is

0%
the base semiconductor being germanium.
0%
production of electron-hole pairs due to thermal excitation.
0%
low doping.
0%
high doping.

In semiconductors, at a room temperature

0%
the valence band is partially empty and the conduction band is partially filled.
0%
the valence band is completely filled and the conduction band is partially filled.
0%
the valence band is completely filled.
0%
the conduction band is completely empty.

In an intrinsic semiconductor, conductivity is

0%
low at room temperature
0%
average
0%
high at room temperature
0%
zero at room temperature

Explanation

In intrinsic semiconductors,

$n = p$ . Hence, at room temperature, no free electrons are available for conduction. If the temperature is increased, the covalent bonds will break and electrons will be freed, each electron will leave behind a hole and capture a new hole the process will continued and charge flows through intrinsic semiconductor. Thus, its conductivity increases with temperature. Hence, in intrinsic semiconductor conductivity is low at room temperature.

In an intrinsic semiconductor, the Fermi energy level is

0%
nearer to valence band than conduction band.
0%
equidistant from conduction band and valence band.
0%
nearer to conduction band than valence band.
0%
bisecting the conduction band.

Explanation

Fermi energy is determined as the energy point where the probability of occupancy by an electron is exactly

$50%$ or

$0.5$ , i.e.,

$\dfrac{1}{2}$ . For the intrinsic semiconductor, since electrons and holes are always created in pairs,

$n = p = ni$ . Hence, there are equal number of holes and electrons in valence band and conduction band respectively. Therefore, the Fermi energy level is equidistant from conduction band and valence band.

The current flow in a Zener diode is mainly due to

0%
thermally generated charge carriers
0%
minority charge carriers
0%
collision generated charge carriers
0%
ions

A Zener diode

0%
is a lightly doped junction diode.
0%
heavily doped junction diode.
0%
is either p-type or n-type.
0%
has no p-n junction.

Explanation

The reverse breakdown voltage depends on doping of the diode. Hence, in the Zener diode the heavy doping of its p-n junction is done. The depletion region formed in the diode is very thin (

$<1\ m$ ) and the reverse bias voltage of about

$5\ V$ which is less than ordinary diode.

In an intrinsic semiconductor, conductivity is due to

0%
doping
0%
breaking of covalent bonds
0%
free electrons
0%
holes

Explanation

In intrinsic semiconductors,

$n = p$ . Hence, at room temperature, no free electrons are available for conduction. If some energy is supplied to the atoms of intrinsic semiconductor, the covalent bonds will break and electrons will be freed, each electron will leave behind a hole and capture a new hole the process will continued and charge flows through intrinsic semiconductor. Thus, in intrinsic semiconductor conductivity is due to breaking of covalent bonds.

p-n junction diode can be used as

0%
amplifer
0%
detector
0%
oscillator
0%
capacitor

Among the following which one gives output

$1$ in the AND gate.

0%
$A = 0,\ B = 0$
0%
$A = 1,\ B = 1$
0%
$A = 1,\ B = 0$
0%
$A = 0,\ B = 1$

Explanation

The truth table for AND gate is as shown in the figure. Thus, the output of an AND gate is

$1$ , if and only if both inputs '

$A$ ' and '

$B$ ' are

$1$ .

The avalanche breakdown in p-n junction is due to

0%
shift of Fermi level.
0%
cumulative effect of conduction band electron.
0%
widening of forbidden gap.
0%
high impurity concentration.

In positive logic, the logic state

$1$ corresponds to

0%
positive voltage
0%
zero voltage
0%
lower voltage level
0%
higher voltage level

Explanation

In digital logic, higher voltage is defined as logic state '

$1$ ' and lower voltage is defined as logic state '

$0$ '. The higher voltage need not necessarily be positive. For example, it is possible that state '

$0$ ' is defined as

$-10\ V$ and state '

$1$ ' is defined as

$-5\ V$ .

In the Boolean algebra, the following one is wrong

0%
$1 + 0 = 1$
0%
$0 + 1 = 1$
0%
$1 + 1 = 1$
0%
$0 + 0 = 1$

Explanation

In the Boolean algebra, binary addition is given as:

$1 + 0 = 1$

$0 + 1 = 1$

$1 + 1 = 1$
Hence,

$0 + 0 = 1$ is wrong.

In Boolean algebra,

$A + B = Y$ implies that

0%
sum of $A$ and $B$ is $Y$ .
0%
$Y$ exists when $A$ exists or $B$ exists or both $A$ and $B$ exist.
0%
$Y$ exists only when $A$ and $B$ both exist.
0%
$Y$ exists when $A$ or $B$ exist but not when both $A$ and $B$ exist.

Explanation

In Boolean algebra,

$A + B = Y$ implies that

$Y$ exists when

$A$ exists or

$B$ exists or both

$A$ and

$B$ exist.

If ‘p’ region of a semi conductor is connected to negative and ‘n’ region to positive pole, it is said to be

0%
directed biased
0%
unbiased
0%
forward biased
0%
reverse biased

Which of the following is not the function of a NOT gate?

0%
Stop a signal.
0%
Invert an input signal.
0%
Complement a signal.
0%
Change the logic in a digital circuit.

Explanation

A NOT gate inverts the input signal which is the same as complementing a signal or changing the logic in a digital circuit. This means that when the input to the NOT gate is logic '

$0$ ', the output is logic '

$1$ '. However, it does not stop a signal.

The energy band gap is maximum in

0%
metals
0%
super conductors
0%
insulators
0%
semiconductors

Explanation

In insulators, the electrons are tightly bound with the nucleus hence, at room temperature thermal energy is not enough to push the electrons into conduction band and hence, no electrons are available for conduction. The energy required for electron to escape out from orbit and to over come the energy gap is thus of the order of

$6\ eV$ , while for semiconductors and conductors it is (of the order of)

$1\ eV$ and

$0$ respectively.

Among the following one can act as the building blocks for the other gates is

0%
NAND and NOR
0%
NAND and AND
0%
XOR and OR
0%
NOT and OR

An AND gate is followed by a NOT gate in series. With two inputs

$A$ &

$B$ , the Boolean expression for the out put

$Y$ will be :

0%
$A.B$
0%
$A + B$
0%
$\overline{A+B}$
0%
$\overline{A.B}$

Explanation

Expression for AND is

$A.B$ and if it is followed by a NOT gate then the Boolean expression will just be the complement of AND.

The gate that has only one input terminal

0%
NOT
0%
NOR
0%
NAN
0%
XOR

The value of

$A.\bar{A}$ in Boolean algebra is

0%
$0$
0%
$1$
0%
$A$
0%
$\bar{A}$

Explanation

Correct answer: Option A

Hint: Complement Law – A term AND‘ed with its complement equals “0”

Step 1: Finding output

Let $Y$ be the output

$Y = A.\overline A$

If $A = 0$ ,

$Y = 0.\overline 0$

$(\overline 0 = 1)$

$Y = 0$

If $A = 1$ ,

$Y = 1.\overline 1$

$(\overline 1 = 0)$

$Y = 0$

Truth table for $A$ and $Y$

$A$	$Y$
0	0
1	0

Therefore the value of $A.\overline A$ in the Boolean algebra is 0

In Boolean algebra

$A.B = Y$ implies that :

0%
product of $A$ and $B$ is $Y$
0%
$Y$ exists when $A$ exists or $B$ exists
0%
$Y$ exists when both $A$ and $B$ exist but not when only $A$ or $B$ exists
0%
$Y$ exists when $A$ or $B$ exists but not both $A$ and $B$ exist.

Explanation

In Boolean algebra

$A.B = Y$ implies that

$Y$ exists when both

$A$ and

$B$ exist but not when only

$A$ or

$B$ exists.

The output of a 2-input OR gate is zero only when its

0%
both inputs are $0$ .
0%
either input is $1$ .
0%
both inputs are $1$ .
0%
either input is $0$ .

The value of

$\bar{A} + A$ in the Boolean algebra is

0%
$A$
0%
$\bar{A}$
0%
$0$
0%
$1$

Explanation

Correct answer: Option D

Hint: Complement Law – A term OR´ed with its complement equals “1”

Step 1: Finding output

Let $Y$ be the output

$Y = \overline A + A$

If $A = 0$ ,

$Y = \overline 0 + 0$

$(\overline 0 = 1)$

$Y = 1$

If $A = 1$ ,

$Y = \overline 1 + 1$

$(\overline 1 = 0)$

$Y = 1$

Truth table for $A$ and $Y$

$A$	$Y$
0	1
1	1

Therefore the value of Boolean algebra is 1

NOR gate is the series combination of

0%
NOT gate followed by OR gate.
0%
OR gate followed by NOT gate.
0%
AND gate followed by OR gate.
0%
OR gate followed by AND gate.

The following truth table is for :

A	B	Y
1	1	0
1	0	1
0	1	1
0	0	1

0%
NAND gate
0%
AND gate
0%
XOR gate
0%
NOT gate

The truth table for NOT gate is

Explanation

NOT gate gives the reverse of the input as output. Truth table for NOT gate is:

Input	Output
$1$	$0$
$0$	$1$

$A = B = 1$ , then in terms of Boolean algebra the value of

$A.B + A$ is not equal to

0%
$B.A+B$
0%
$B+A$
0%
$B$
0%
$\bar{A}.B$

Explanation

For

$A = B = 1$ ,

$\Rightarrow A.B+B = 1.1 + 1 = 1 + 1 = 1$

Therefore,

(A)

$B.A+B = 1.1 + 1 = 1 + 1 = 1$

(B)

$B+A = 1 + 1 = 1$

(C)

$B = 1$

(D)

$\bar A.B=1.1+1 = \bar 1.1 = 0.1 = 0$

Hence, option D is the correct answer.

The logic expression which is NOT true in Boolean algebra is

0%
$[\bar{1}+\bar{1}].1=0$
0%
$[\bar{1}+0].1=0$
0%
$[\bar{1}+0].\bar{1}=0$
0%
$[1+1].1=0$

Explanation

$[\bar 1+\bar 1].1= [0+0].1 = 0$

$[\bar 1+0].1= [0+0].1 = 0$

$[\bar 1+0].\bar 1= [0+0].0 = 0$

$[1.1].1 = 1.1 = 1 \neq 0$

The symbol represents

0%
NOT gate
0%
OR gate
0%
AND gate
0%
NOR gate

Explanation

The symbol represented above by definition is of NAND gate which gives output only when both the input signals are low i.e

$0$

In the Boolean algebra, of the following one which is not equal to

$A$ is

0%
$A.A$
0%
$A + A$
0%
$\bar{A}.A$
0%
$\overline{\bar A + \bar A}$

Explanation

The truth table for AND gate is given as shown in the figure.
When

$A$ is true,

$\bar{A}$ is false and vice versa.

Hence value of

$\bar{A}.A$ is always false(looking at the second and third row of the table) which is not equal to

$A$ .

Hence, option C is the answer.

In the Boolean algebra :

$A + B =$

0%
$\bar{A}$ + $\bar{B}$
0%
A.B
0%
$\bar{\bar{A}}+\bar{\bar{B}}$
0%
$\bar{\bar{A}}$ + $\bar{B}$

Explanation

Input	$\bar A+\bar B$	$A.B$	$\bar{\bar A} + \bar{\bar B}$	$\bar {\bar A} + \bar B$
$A=B=0$	1	0	0	1
$A=B=1$	0	1	1	1
$A=0, B=1$	1	0	1	1
$A=1, B=0$	1	0	1	1

$A = 1$ and

$B = 0$ , then in terms of Boolean algebra the value of

$A.A + B$ is

0%
$A$
0%
$B^2$
0%
$B$
0%
$A \cdot B$

Explanation

For

$A=1$ and

$B=0$

$A.A+B=1.1+0=1$

Hence,

$A.A+B=A$ ............(since,

$A=1$ )

$A = 1, B = 0$ then the value of

$\bar {A} + B$ in terms of Boolean algebra is

0%
$A$
0%
$B$
0%
$B + A$
0%
$A.\bar{B}$

Explanation

For

$A = 1, B = 0$

$\bar A+B = \bar 1 + 0 = 0 + 0 = 0$

Hence,

$\bar A+B = B$ .............(since,

$B= 0$ )

CBSE Questions for Class 12 Engineering Physics Semiconductor Electronics: Materials,Devices And Simple Circuits Quiz 2 - MCQExams.com

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Practice Class 12 Engineering Physics Quiz Questions and Answers

CBSE Questions for Class 12 Engineering Physics Semiconductor Electronics: Materials,Devices And Simple Circuits Quiz 2 - MCQExams.com

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Practice Class 12 Engineering Physics Quiz Questions and Answers

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